The present invention relates to microelectronic assemblies and more particularly relates to semiconductor chip assemblies in which a plurality of chips are stacked one atop the other and semiconductor chip assemblies having test contacts.
Semiconductor chips are commonly provided as individual, prepackaged units. A standard chip has a flat, rectangular body with a large front face having contacts for connection to the internal circuitry of the chip. Each individual chip is typically mounted to a substrate or chip carrier, which in turn is mounted on a circuit panel such as a printed circuit board. Considerable effort has been devoted towards development of so-called xe2x80x9cmultichip modulesxe2x80x9d in which several chips having related functions are attached to a common circuit panel and protected by a common package. This approach conserves some of the space which is ordinarily wasted by individual chip packages. However, most multichip module designs utilize a single layer of chips positioned side-by-side on a surface of a planar circuit panel. In xe2x80x9cflip chipxe2x80x9d designs, the front face of the chip confronts the face of the circuit panel and the contacts on the chip are bonded to the circuit panel by solder balls or other connecting elements. The xe2x80x9cflip chipxe2x80x9d design provides a relatively compact arrangement; each chip occupies an area of the circuit panel equal to or slightly larger than the area of the chip front face. As disclosed, in commonly assigned U.S. Pat. Nos. 5,148,265 and 5,148,266, the disclosures of which are incorporated herein by reference, certain innovative mounting techniques offer compactness approaching or equaling that of conventional flip chip bonding without the reliability and testing problems commonly encountered in that approach.
Various proposals have been advanced for packaging chips in a xe2x80x9cstackedxe2x80x9d arrangement, i.e., an arrangement where several chips are placed one atop the other whereby several chips can be maintained in an area of the circuit board which is less than the total area of the chip faces, such as disclosed in commonly assigned U.S. Pat. No. 5,347,159, the disclosure of which is incorporated herein by reference. U.S. Pat. No. 4,941,033 discloses an arrangement in which chips are stacked one atop the other and interconnected with one another by conductors on so-called xe2x80x9cwiring filmsxe2x80x9d associated with the chips.
Commonly assigned U.S. patent application Ser. No. 08/705,309 filed Aug. 29, 1996, the disclosure of which is incorporated by reference herein, teaches an assembly of semiconductor chips which are vertically stacked one atop the other. One aspect of the invention in the ""309 application provides a plurality of semiconductor chip assemblies whereby each assembly includes an interposer and a semiconductor chip mounted thereto. Each interposer also includes a plurality of leads electrically interconnecting the chip and the interposer. The assembly also includes compliant layers disposed between the chips and the interposers so as to permit relative movement of the chips and interposers to compensate for thermal expansion and contraction of the components. The subassemblies are then stacked one atop the other so that the chips overlie one another. Although the approach set forth in the ""309 application offers useful ways of making a stacked assembly, still other methods would be desirable.
Stacked chip assemblies should deal effectively with the problems associated with heat generation in stacked chips. Chips dissipate electrical power as heat during operation and where chips are stacked one atop the other, it is difficult to dissipate the heat generated by the chips in the middle of the stack. Consequently, the chips in such a stack may undergo substantial thermal expansion and contraction during operation. This, in turn, imposes significant mechanical stress on the interconnecting arrangements and on the mountings which physically retain the chips. Moreover, the assembly should be simple, reliable and easily fabricated in a cost-effective manner.
Semiconductor chips are typically manufactured in a multi-step process. Because repair costs and yield losses issues in the manufacturing process may be compounded with stacked chip assemblies and other multichip modules, such assemblies should be easily testable.
One aspect of the present invention provides a method of making a stacked microelectronic assembly. Preferred methods in accordance with this aspect of the invention include providing a flexible substrate having a plurality of attachment sites. The flexible substrate includes conductive terminals accessible at a surface thereof and wiring, such as one or more wiring layers, connected to the conductive terminals and having flexible leads extending to the attachment sites. The flexible substrate preferably includes a polymeric material and has a thickness of approximately between 25 and 75 microns. The wiring layer or layers typically include(s) a flexible electrically conductive metal, such as copper. In certain embodiments, the flexible substrate may include through vias extending from the first surface to the second surface thereof. The through vias may include a conductive material for electrically interconnecting at least some of the flexible leads with the conductive terminals accessible at the one or more surfaces of the flexible substrate.
In the next stage of the process, a plurality of microelectronic elements are assembled to the attachment sites and electrically interconnected to the leads extending to the attachment sites. Each microelectronic element preferably includes a semiconductor chip having a front face with electrical contacts thereon and a back surface. During the assembly step, the front face of each chip is abutted with one of the attachment sites so that the electrical contacts on the semiconductor chip are aligned with the leads at the attachment sites. The conductive leads which extend to the attachment sites are electrically interconnected with the contacts using bonding techniques such as ultrasonic or thermocompression bonding or by using the bonding techniques disclosed in U.S. Pat. Nos. 5,398,863; 5,390,844; 5,536,909 and 5,491,302 the disclosures of which are incorporated by reference herein. The other ends of the flexible leads are connected to at least some of the conductive terminals accessible at one of the surfaces of the flexible substrate.
In certain embodiments, a plurality of compliant pads may be provided between the semiconductor chip and the attachment site. The compliant pads define channels running therebetween and preferably include a resilient material such as silicone. After the leads have been bonded to the contacts, a curable liquid encapsulant is then cured, such as by using heat, to provide a compliant interface between the chip and the flexible substrate.
Next, the flexible substrate is folded, preferably in an xe2x80x9cSxe2x80x9d-shaped or gentle zig-zag configuration, and at least some of the microelectronic elements assembled to the flexible substrate are stacked in vertical alignment with one another. During the vertical stacking stage, some of the microelectronic elements may be grouped in pairs and the paired microelectronic elements juxtaposed with one another. Preferably, during the juxtaposing step, the back surfaces of the paired microelectronic elements are positioned close to one another and most preferably are in contact with one another. By vertically aligning at least some of the microelectronic elements in close proximity with one another, the size of the stacked assembly will be minimized. After the flexible substrate is folded and the microelectronic elements are stacked, the conductive terminals of the flexible substrate are preferably exposed at the bottom of the stacked assembly for connecting the assembly with an external circuit element. The attachment sites of the flexible substrate should be spaced sufficiently apart so that the back surfaces of the paired microelectronic elements can be readily juxtaposed with one another during the folding and stacking steps without stretching or tearing the flexible substrate. In embodiments having two or more sets of paired microelectronic elements, the two or more sets preferably are stacked or aligned one atop the other in a substantially vertical alignment.
Before the stacked assembly is electrically interconnected with an external circuit element, such as a printed circuit board, the stacked pairs are typically secured or maintained in vertical alignment. In one preferred embodiment, the stacked pairs are maintained in vertical alignment by providing a mechanical element which holds the stacked pairs in vertical alignment. The mechanical element may include a bracket which abuts against the top of the stacked microelectronic elements for holding the microelectronic elements in place and transferring heat from the top of the assembly. The mechanical element may include a thermally conductive material, such as a metal, for dissipating heat from the stacked microelectronic assembly. Preferably the mechanical element has openings in the side walls thereof or has no side walls at all so that cooling air may flow freely around the stacked pairs of microelectronic elements for holding the microelectronic elements in place and transferring heat from the top of the stack. The mechanical element may also include cooling fins at one or more surfaces thereof for dissipating heat from the chips.
Thermally conductive elements, such as flexible thermally conductive sheets including metal may be provided between the back surfaces of said paired microelectronic elements. The thermally conductive sheets transfer heat between the microelectronic elements to the top and the bottom of the stacked assembly. Moreover, the thermally conductive elements conduct heat laterally out of the stack. The thermally conductive sheets are also preferably in heat transfer relation with the mechanical element for transferring heat from the microelectronic elements to the mechanical element. For example, the conductive sheet may be in physical contact with the electrical element. In other embodiments, the paired microelectronic elements may be maintained in the back surface-to-back surface configuration by applying an adhesive, such as a thermally conductive adhesive, between the back surfaces of the paired microelectronic elements before the back surfaces are abutted against one another. The thermally conductive adhesive serves two purposes. First, it adheres the back surfaces of the paired microelectronic elements together to provide rigidity to the assembly and maintain the stacked microelectronic elements in vertical alignment. In addition, the thermally conductive adhesive transfers heat between the stacked microelectronic elements so that heat can be dissipated from the top and/or the bottom of the assembly. Additional layers of the thermally conductive adhesive may also be applied between portions of the flexible substrate which are folded over upon itself during the stacking step to enhance heat transfer. Thus, the stacked microelectronic elements may be maintained in vertical alignment using the mechanical elements or the thermally conductive adhesive or a combination of both. In other embodiments, the adhesive may be applied between the back surfaces of only some of the paired microelectronic elements and/or some of the pairs of microelectronic elements.
The stacked assembly made in accordance with the various embodiments described above may then be electrically interconnected with an external circuit element, such as a printed circuit board, by electrically connecting the conductive terminals exposed at the bottom of the assembly to conductive pads on an external circuit element. As mentioned above, the flexible substrate is folded in such a manner that the conductive terminals are accessible at the bottom of the stacked assembly so that the stacked assembly can be readily interconnected to an external circuit element.
As mentioned above, in order to provide a compliant interface, a curable liquid encapsulant composition may be disposed between the flexible substrate and the microelectronic elements and cured. Encapsulant located between adjacent microelectronic elements may however interfere with the proper folding of the flexible substrate. Before the flexible substrate is folded therefore, a dam may be placed on the flexible substrate between adjacent microelectronic elements. The dam serves to insure that area between microelectronic elements is relatively free of encapsulant. Typically, the dam is removed before the flexible substrate is folded.
In another embodiment, a spacer may be disposed on the flexible substrate intermediate between adjacent microelectronic elements or attachment sites. The spacer is typically placed on the flexible substrate before it is folded. When the flexible substrate is folded, the spacer ensures that a minimum distance is maintained between the folds of the substrate. If two vertically aligned microelectronic elements are to be adhered together using an adhesive, the spacers can be used to define the thickness of the adhesive to be used. If the spacer has a curved bottom surface, the spacer can be used to define the radius of curvature at the fold in the flexible substrate. Defining the radius of curvature can be useful in to minimize breaking or kinking of the flexible substrate.
In still another embodiment, electrically conductive test contacts may be disposed on one or more surfaces of the flexible substrate. The test contacts are electrically connected to the microelectronic elements, typically through wiring on the flexible substrate. In preferred embodiments, the flexible substrate in folded in such a manner that the test contacts are readily accessible, most preferably at the top of the stacked assembly, so that the stacked assembly can be tested before, during or after the stacked assembly has been connected to an external circuit element, such as a printed circuit board. By testing the stacked assembly before interconnecting the assembly to a printed circuit board, a printed circuit board assembler can minimize yield loss and reduce repair costs.
Assemblies fabricated according to the preferred embodiments of the present invention save valuable space on circuit boards because at least some of the chips are stacked vertically one atop the other rather than in a side-by-side configuration. The present invention also provides an inexpensive and economical means for manufacturing stacked assemblies. The aforementioned inventive methods and assemblies are preferably used to package memory devices such as a dynamic random access memory device (xe2x80x9cDRAMxe2x80x9d) or other memory chips. Therefore, in preferred embodiments, the wiring layer will interconnect certain contacts on each of the semiconductor chips together in a bus configuration. Thus, corresponding contacts on each chip can be connected to the same lead. However, even in this configuration, the flexible leads may directly connect one or more of the individual microelectronic element contacts to a respective conductive terminal at one or more surfaces of the flexible substrate.
Another aspect of the present invention provides a stacked microelectronic assembly including a flexible substrate having a plurality of attachment sites. The flexible substrate includes conductive terminals accessible at a surface thereof and wiring, such as one or more wiring layers, connected to the conductive terminals and including leads extending to the attachment sites. A plurality of microelectronic elements are assembled to the attachment sites and are electrically interconnected with the leads. The flexible substrate is folded for stacking at least some of the microelectronic elements in substantially vertical alignment with one another. A securing element, such as the mechanical element and/or the adhesive described above, maintains the stacked microelectronic elements in a substantially vertical alignment with one another whereby the conductive terminals are exposed at the bottom end of the assembly. In preferred embodiments, the second surface of the flexible substrate includes the conductive terminals which are electrically interconnected with at least some of the leads. However, in other embodiments, the conductive terminals may be provided at the first surface of the flexible substrate. After at least some of the microelectronic elements have been stacked in vertical alignment, the conductive terminals are electrically interconnected with an external circuit element as described above. The flexible substrate typically includes a polymeric material and has a thickness of between 25 to 75 microns and the wiring layer includes a flexible electrically conductive metal. Each of the microelectronic elements preferably includes a semiconductor chip having a front face with one or more electrical contacts thereon which are electrically interconnected with the leads at the attachment sites.
In another embodiment of the present invention, thermally conductive elements, preferably including a flexible metal sheet, are disposed between the back surfaces of at least some of the paired microelectronic elements in the assembly for transferring heat up and down the assembly. The ends of the thermally conductive sheets extending from the sides of the stack may also contact the mechanical element holding the chips in vertical alignment to transfer heat from the chips to the bracket, which in turn dissipates the heat from the stacked assembly. The ends of the thermally conductive sheets may also include flanges which contact the mechanical element. The flanges ensure a reliable contact between the conductive sheets and the mechanical element and increase the surface area for transferring heat therebetween.
In other embodiments, some of the microelectronic elements are stacked one atop the other in a vertical stack while other chips are stacked side-by-side. For example, first and second groups of microelectronic elements may be assembled to the flexible substrate so that the elements within any one group are in proximity with one another while the groups are spaced slightly apart from one another. The flexible substrate is then folded so that the back surfaces of the chips in the first group are in contact with the back surfaces of the chips in the second group. Although the chips within any one of the groups are side-by-side, by stacking one group atop another in vertical alignment, the final assembly saves valuable space on the circuit board. Also, the flex circuit is economical to manufacture compared with other more esoteric stacking package elements. In other embodiments, the stacked assembly may include a plurality of microelectronic elements stacked one atop the other in a vertical stack with one or more microelectronic elements positioned to the side of the vertical stack.
In another embodiment of the invention, some of the microelectronic elements are assembled to attachment sites at the first surface of the flexible substrate while other microelectronic elements are assembled to attachment sites at the second surface of the flexible substrate. The flexible substrate is then folded in an xe2x80x9cSxe2x80x9d-shaped or gentle zig-zag configuration to provide a stacked assemble whereby the chips are in substantial vertical alignment with one another. The flexible substrate may also be folded in a spiral configuration to provide a substantially vertical stack. The stack is preferably maintained in vertical alignment by using the thermally conductive adhesive and/or the mechanical element discussed above. The thermally conductive plates described above may be positioned between the microelectronic elements to transfer heat from between the chips and to the top and the bottom of the assembly.
In other embodiments, the conductive terminals can be accessible at either the first surface or the second surface of the flexible substrate. After the chips are assembled to the flexible substrate, the flexible substrate is folded so that the chips are in vertical alignment and so the conductive terminals are exposed at the bottom of the stack. In preferred embodiments, the conductive terminals be accessible at the bottom of the assembly so the assembly may be electrically connected to an external circuit element, such as a printed circuit board.
In another embodiment, the stacked assembly includes a plurality of electrically conductive test contacts accessible at a surface of the stacked assembly. In preferred embodiments, the test contacts are accessible at the top of the assembly so that the assembly may be tested before, during or after it is electrically interconnected to an external circuit element.
In another embodiment, the stacked assembly includes at least one spacer disposed between adjacent microelectronic elements.
In another embodiment, two or more of the stacked assemblies of the present invention may be stacked together to form a multi-part stacked assembly. The multi-part stacked assembly of the present invention includes a first assembly and a second assembly. The first assembly includes a plurality of connection pads accessible at a surface of the flexible substrate, preferably at the top end of the first assembly. The terminals of the second assembly include a plurality of connection elements, such as solder balls. The first and second assemblies are stacked together by aligning and interconnecting the solders balls of the second assembly with the connection pads of the first assembly.
In yet another embodiment of the present invention, a microelectronic element assembly includes a flexible substrate having an attachment site. The flexible substrate includes conductive terminals accessible at a surface thereof and wiring, such as one or more wiring layers, connected to the conductive terminals and including leads extending to the attachment site. The flexible substrate also includes a plurality of test contacts accessible at a surface thereof. The assembly also includes a microelectronic element connected to the flexible substrate at the attachment site. Contacts on the face surface of the microelectronic element are interconnected to the terminals with the leads. The flexible substrate is folded over and connected to the back surface of the microelectronic element, preferably so that the test contacts are accessible at the top surface of the assembly. The assembly may also include a plurality of connection pads to form a first microelectronic assembly. A second microelectronic assembly may include a plurality of solder balls or other connection elements connected to the terminals. The first and second assemblies of this aspect of the invention may be interconnected, by connecting the solder balls of the second assembly to the connection pads of the first assembly, to form a stacked microelectronic assembly.
The stacked assemblies described in the above embodiments of the present invention provide economical and space saving structures for use in electronic devices. These and other objects features and advantages of the present invention will be more readily apparent from the description of the preferred embodiments set forth below and taken in conjunction with the accompanying drawings.